发明授权
- 专利标题: Low current floating gate programming with bit-by-bit verification
- 专利标题(中): 低电流浮栅编程与逐位验证
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申请号: US812615申请日: 1997-03-06
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公开(公告)号: US5787039A公开(公告)日: 1998-07-28
- 发明人: Han-Sung Chen , Tzeng-Huei Shiau , Yu-Shen Lin , Chung-Cheng Tsai , Jin-Lien Lin , Ray Lin Wan , Yuan-Chang Liu , Chun Hsiung Hung
- 申请人: Han-Sung Chen , Tzeng-Huei Shiau , Yu-Shen Lin , Chung-Cheng Tsai , Jin-Lien Lin , Ray Lin Wan , Yuan-Chang Liu , Chun Hsiung Hung
- 申请人地址: TWX Hsinchu
- 专利权人: Macronix International Co., Ltd.
- 当前专利权人: Macronix International Co., Ltd.
- 当前专利权人地址: TWX Hsinchu
- 主分类号: G11C16/10
- IPC分类号: G11C16/10 ; G11C16/34 ; G11C16/06
摘要:
A system for programming arrays of floating gate memory cells reduces programming current requirements, and reduces wordline and bitline stress during programming. A word-to-be-programmed into a floating gate memory array is divided into a plurality of smaller subwords. Only one subword is programmed at a time, thereby reducing programming current requirements. Additionally, subwords which are successfully programmed are not reprogrammed even if bits in other subwords do not program properly. This creates less wordline stress than previous systems which program an entire word at once, thereby requiring subwords which program successfully to be reprogrammed along with subwords which fail to program. Finally, within each subword only those bits which failed to program are reprogrammed, thereby reducing bitline stress during reprogramming for those bits which were successfully programmed.
公开/授权文献
- US5296394A Manufacturing method of GaAs metal semiconductor FET 公开/授权日:1994-03-22
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