发明授权
US5844916A Built in access time comparator 失效
内置访问时间比较器

Built in access time comparator
摘要:
A method of testing an integrated circuit chip comprised of applying to and storing a first test pattern of data on the chip, applying a second test pattern of data to the chip which corresponds to the first test pattern, comparing the stored test pattern with the second test pattern on the chip, and indicating a test fault on a test pad in the event at least one bit of the first and second test pattern differ from each other.
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