发明授权
- 专利标题: Semiconductor memory device surely reset upon power on
- 专利标题(中): 上电时,半导体存储器件确实复位
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申请号: US990575申请日: 1997-12-15
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公开(公告)号: US5870342A公开(公告)日: 1999-02-09
- 发明人: Tatsuya Fukuda
- 申请人: Tatsuya Fukuda
- 申请人地址: JPX Tokyo
- 专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX9-168675 19970625
- 主分类号: G11C11/413
- IPC分类号: G11C11/413 ; G11C11/401 ; G11C29/14 ; G11C29/46 ; G11C7/00 ; G11C8/00 ; G11C16/04
摘要:
A mode setting signal generating circuit activates mode setting signals in accordance with external signals. A test mode activating signal generating circuit takes in an externally applied address signal Add as the mode setting signals are activated, and drives a test mode activating signal to the active state in accordance with the state thereof. As power on detection signal from a power on detection circuit is activated, test mode activating signal is reset to the initial state, and a reset circuit holds the test mode activating signal at the inactive state, in accordance with imperfect activation of the power on detection signal. Internal state is prevented from erroneously set to a test mode state, even when power on detection signal is imperfectly generated at the time of power on.
公开/授权文献
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