- 专利标题: Bus system for use with information processing apparatus
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申请号: US959913申请日: 1997-10-29
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公开(公告)号: US5889971A公开(公告)日: 1999-03-30
- 发明人: Koichi Okazawa , Koichi Kimura , Hitoshi Kawaguchi , Ichiharu Aburano , Kazushi Kobayashi , Tetsuya Mochida
- 申请人: Koichi Okazawa , Koichi Kimura , Hitoshi Kawaguchi , Ichiharu Aburano , Kazushi Kobayashi , Tetsuya Mochida
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX2-144301 19900604; JPX3-105536 19910506
- 主分类号: G06F13/16
- IPC分类号: G06F13/16 ; G06F12/00 ; G06F13/36 ; G06F13/40 ; G06F13/00
摘要:
A processor bus linked with at least a processor, a memory bus linked with a main memory, and a system bus linked with at least an input/output device are connected to a three-way connection control system. The control system includes a bus-memory connection controller connected to address buses and control buses respectively of the processor, memory, and system buses to transfer address and control signals therebetween. The control system further includes a data path switch connected to data buses respectively of the processor, memory, and system buses to transfer data via the data buses therebetween depending on the data path control signal.