发明授权
- 专利标题: Semiconductor device
- 专利标题(中): 半导体器件
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申请号: US794504申请日: 1997-02-04
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公开(公告)号: US5905286A公开(公告)日: 1999-05-18
- 发明人: Toshiaki Iwamatsu , Yasuo Yamaguchi , Shigenobu Maeda , Shoichi Miyamoto , Akihiko Furukawa , Yasuo Inoue
- 申请人: Toshiaki Iwamatsu , Yasuo Yamaguchi , Shigenobu Maeda , Shoichi Miyamoto , Akihiko Furukawa , Yasuo Inoue
- 申请人地址: JPX Tokyo
- 专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX6-269695 19941102; JPX6-334025 19941215
- 主分类号: H01L21/764
- IPC分类号: H01L21/764 ; H01L21/265 ; H01L21/336 ; H01L21/76 ; H01L21/762 ; H01L21/8238 ; H01L21/84 ; H01L27/08 ; H01L27/092 ; H01L27/12 ; H01L29/786 ; H01L27/01 ; H01L31/0392
摘要:
In a semiconductor device having an SOI structure and a method of manufacturing the same, influence by a parasitic transistor can be prevented, and no disadvantage is caused in connection with a manufacturing process. In this semiconductor device, an upper side portion of a semiconductor layer is rounded. Thereby, concentration of an electric field at the upper side portion of the semiconductor layer can be prevented. As a result, lowering of a threshold voltage of a parasitic transistor can be prevented, so that the parasitic transistor does not adversely affect subthreshold characteristics of a regular transistor. Owing to provision of a concavity of a U-shaped section, generation of etching residue can be prevented when etching a gate electrode for patterning the same. Thereby, a disadvantage is not caused in connection with the manufacturing process.
公开/授权文献
- US5206895A X-ray tube 公开/授权日:1993-04-27
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