- 专利标题: Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering
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申请号: US76012申请日: 1998-05-11
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公开(公告)号: US5930663A公开(公告)日: 1999-07-27
- 发明人: James P. Baukus , Lap Wai Chow , William M. Clark, Jr.
- 申请人: James P. Baukus , Lap Wai Chow , William M. Clark, Jr.
- 申请人地址: CA El Segundo
- 专利权人: Hughes Electronics Corporation
- 当前专利权人: Hughes Electronics Corporation
- 当前专利权人地址: CA El Segundo
- 主分类号: H01L21/3205
- IPC分类号: H01L21/3205 ; G06F21/06 ; G11C7/24 ; H01L21/82 ; H01L21/822 ; H01L23/52 ; H01L27/02 ; H01L27/04 ; H01L21/265
摘要:
An integrated digital circuit is protected from reverse engineering by fabricating all transistors of like conductivity with a common size and geometric layout, providing a common layout for different logic cells, connecting doped circuit elements of like conductivity with electrically conductive doped implants in the substrate rather than metalized interconnections, and providing non-functional apparent interconnections that are interrupted by non-discernable channel stops so that all cells falsely appear to have a common interconnection scheme. The camouflage is enhanced by providing a uniform pattern of metal leads over the transistor array, with a uniform pattern of heavily doped implant taps from the transistors for connection to the leads; undesired tap-lead connections are blocked by channel stops.
公开/授权文献
- USD405822S Bottom section of an ink bottle 公开/授权日:1999-02-16
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