发明授权
US5940336A Reference clock generating circuit in memory to be asynchronously precharged and activated 失效
存储器中的参考时钟发生电路被异步预充电和激活

  • 专利标题: Reference clock generating circuit in memory to be asynchronously precharged and activated
  • 专利标题(中): 存储器中的参考时钟发生电路被异步预充电和激活
  • 申请号: US956105
    申请日: 1997-10-24
  • 公开(公告)号: US5940336A
    公开(公告)日: 1999-08-17
  • 发明人: Sang-Hyun Lee
  • 申请人: Sang-Hyun Lee
  • 申请人地址: KRX Chungcheongbuk-do
  • 专利权人: LG Semicon Co., Ltd.
  • 当前专利权人: LG Semicon Co., Ltd.
  • 当前专利权人地址: KRX Chungcheongbuk-do
  • 优先权: KRX96-69651 19961221
  • 主分类号: G11C11/41
  • IPC分类号: G11C11/41 G06F1/04 G06F1/06 G06F12/00 G11C7/00 G11C7/22
Reference clock generating circuit in memory to be asynchronously
precharged and activated
摘要:
A reference clock generating circuit and method, the circuit having an OR unit for ORing signals, from plural address change defectors, indicative of a change in an inputted address to provide an OR-result on a common terminal; a delay unit for delaying the signals on the common terminal for a predetermined time; a pull-up unit for pulling-up an output potential on the common terminal according to an output signal of the delay unit; and a stabilizing unit for stabilizing a signal on the common terminal.
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