Invention Grant
- Patent Title: Vector absolute--value calculation circuit
- Patent Title (中): 矢量绝对值计算电路
-
Application No.: US905784Application Date: 1997-08-12
-
Publication No.: US5958002APublication Date: 1999-09-28
- Inventor: Changming Zhou , Guoliang Shou , Kunihiko Suzuki , Kazunori Motohashi , Makoto Yamamoto , Sunao Takatori
- Applicant: Changming Zhou , Guoliang Shou , Kunihiko Suzuki , Kazunori Motohashi , Makoto Yamamoto , Sunao Takatori
- Applicant Address: JPX Tokyo
- Assignee: Yozan, Inc.
- Current Assignee: Yozan, Inc.
- Current Assignee Address: JPX Tokyo
- Priority: JPX8-229402 19960813
- Main IPC: G06G7/25
- IPC: G06G7/25 ; G06G7/22 ; G06G7/00 ; G06G7/16
Abstract:
A highly accurate vector absolute-value calculation circuit uses analog processing and minimal hardware. Signal voltages corresponding to an I component (real number part) and a Q component (imaginary number part) are input to a first absolute-value calculation circuit 13 and a second absolute-value calculation circuit 14 through terminals 11 and 12, respectively, and they are each converted into absolute-value signals. The component I absolute-value and component Q absolute-value are compared in a comparison circuit 20. According to the result, the larger absolute-value signals are output to an input capacitor 23 of a neural computation circuit, and the smaller absolute-value signals are output to an input capacitor 24 by controlling multiplexers 21 and 22. The capacity ratio of a feedback capacitor 26 of a neural computation circuit and input capacitors 23 and 24 is 11:10:5. The complex number absolute-value calculated by the following formula is output from an output terminal 27. ##EQU1##
Public/Granted literature
- US5265140A Inverted vane mixing grid Public/Granted day:1993-11-23
Information query