Invention Grant
- Patent Title: Gate electrode stack with diffusion barrier
- Patent Title (中): 具有扩散阻挡层的栅极电极堆叠
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Application No.: US931336Application Date: 1997-09-16
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Publication No.: US5962904APublication Date: 1999-10-05
- Inventor: Yongjun Hu
- Applicant: Yongjun Hu
- Applicant Address: ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: ID Boise
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L29/49 ; H01L29/12
Abstract:
Disclosed is a gate electrode stack structure that uses a refractory metal silicon nitride layer as a diffusion barrier. The gate electrode stack has several layers, including a gate oxide layer over the semiconductor substrate, a polysilicon layer over the gate oxide layer, and the diffusion barrier between the polysilicon layer and a layer of electrically conductive material above. The diffusion barrier, which is preferably composed of a substantially amorphous refractory metal silicon nitride such as tungsten silicon nitride, of does not oxidize when an oxidation process is applied to the gate electrode stack. Moreover, the diffusion barrier substantially prevents diffusion of the electrically conductive material into the polysilicon during heating processes. The refractory metal silicon nitride maintains a bulk resistivity less than 2,000 microhm-cm, thereby preserving satisfactory conductivity in the gate electrode stack. A process for forming the gate electrode stack and diffusion barrier is also disclosed.
Public/Granted literature
- US4772255A Method and apparatus for sizing grains smaller than 300.mu. Public/Granted day:1988-09-20
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