A process of making a multilayer printed wiring board assembly. The process includes the steps of providing a first and a second substrate made of a dielectric material; depositing a first wiring pattern on the first substrate and a second wiring pattern on the second substrate with a conductive material; depositing a dielectric material on the first and second wiring patterns and defining a via connecting zone on the first and the second wiring pattern for communicating signals between the first and the second wiring pattern by exposing a selective portion of the first and second wiring patterns; depositing a conductive bonding material on the via connecting zone of one of the first and the second wiring pattern; arranging the first and the second substrate in sandwiched juxtaposition such that the via connecting zones of the first and the second wiring pattern are opposite each other and in substantial alignment with each other so that the conductive bonding material deposited on the one of the via connecting zones contacts another one of the via connecting zones; and curing the deposited bonding material thereby forming a conductive joint connecting the first and the second via connecting zones.