利索-全球专利检索

  1. 登录
  2. 注册
发明授权
US6038661A Single-chip data processor handling synchronous and asynchronous exceptions by branching from a first exception handler to a second exception handler 失效
单芯片数据处理器通过从第一个异常处理程序分支到第二个异常处理程序来处理同步和异步异常

Single-chip data processor handling synchronous and asynchronous exceptions by branching from a first exception handler to a second exception handler
摘要：
A vector point of an exception handler related to TLB miss exception events is obtained by reading a vector base address of a register VBR one time, and by adding a vector offset (H'400) thereto. A vector point of an exception handler related to exception events other than the TLB miss exception events is obtained by adding a vector offset to a value (vector base address) of the register VBR, and an exception code which is an address offset obtained by reading a value of the register EXPEVT or INTEVT one time is added to the vector point that is obtained. Thus, the processing is branched to a required exception handler to execute the exception event processing related to exception events other than the TLB miss exception events.
摘要（中）：

通过读取寄存器VBR的向量基地址一次并通过向其中添加向量偏移（H'400）来获得与TLB未命中异常事件相关的异常处理程序的向量点。 通过向寄存器VBR的值（向量基地址）添加矢量偏移，以及通过读取得到的地址偏移的异常代码，获得与除了TLB未命中异常事件之外的异常事件相关的异常处理程序的向量点 寄存器EXPEVT或INTEVT的值一次被添加到所获得的向量点。 因此，处理被分支到所需的异常处理程序，以执行与除了TLB未命中异常事件之外的异常事件相关的异常事件处理。

公开/授权文献
信息查询
Global Dossier Espacenet
0/0