Invention Grant
- Patent Title: SRAM memory device with improved performance
- Patent Title (中): TFT SRAM存储器件具有改进的性能
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Application No.: US379230Application Date: 1999-08-23
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Publication No.: US6078087APublication Date: 2000-06-20
- Inventor: Kuo Ching Huang , Yean-Kuen Fang , Mong-Song Liang , Cheng-Yeh Shih , Dun Nian Yaung
- Applicant: Kuo Ching Huang , Yean-Kuen Fang , Mong-Song Liang , Cheng-Yeh Shih , Dun Nian Yaung
- Applicant Address: TWX Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company
- Current Assignee: Taiwan Semiconductor Manufacturing Company
- Current Assignee Address: TWX Hsin-Chu
- Main IPC: H01L21/8244
- IPC: H01L21/8244 ; H01L27/11 ; H07L27/11
Abstract:
A contact between a conductor and a substrate region in a MOSFET SRAM device is formed by a dielectric layer on the surface of a partially completed SRAM device with pass transistors and latch transistors with the dielectric layer being formed above those pass and latch transistors. A thin film transistor gate electrode and an interconnection line are formed on the upper surface of the dielectric layer. A gate oxide layer covers the gate electrode and the interconnection line. A polysilicon conductive layer which covers the gate oxide layer includes a channel region between a source region and a drain region which are formed on opposite sides of the channel region. There is a channel mask formed self-aligned with the channel region formed above the channel region as well as being above the gate electrode. The polysilicon conductive layer is doped aside from the channel mask thereby providing a source region and a drain region on opposite sides of the channel region. A doped interconnect line is also formed in the polysilicon conductive layer. There is a contact which extends through the gate oxide layer between the interconnection line and the polysilicon conductive layer.
Public/Granted literature
- US5532603A Cross-talk measurement apparatus with near-end compensation Public/Granted day:1996-07-02
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