发明授权
US6108721A Method and apparatus for ensuring data consistency between an i/o
channel and a processor
失效
用于确保i / o通道和处理器之间的数据一致性的方法和装置
- 专利标题: Method and apparatus for ensuring data consistency between an i/o channel and a processor
- 专利标题(中): 用于确保i / o通道和处理器之间的数据一致性的方法和装置
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申请号: US107008申请日: 1998-06-29
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公开(公告)号: US6108721A公开(公告)日: 2000-08-22
- 发明人: William R. Bryg , Monish S. Shah , Thomas V. Spencer
- 申请人: William R. Bryg , Monish S. Shah , Thomas V. Spencer
- 申请人地址: CA Palo Alto
- 专利权人: Hewlett-Packard Company
- 当前专利权人: Hewlett-Packard Company
- 当前专利权人地址: CA Palo Alto
- 主分类号: G06F12/08
- IPC分类号: G06F12/08 ; G06F13/12 ; G06F13/28 ; G06F13/38 ; G06F13/00
摘要:
In a method and apparatus that ensures data consistency between an I/O channel and a processor, system software issues an instruction which causes the issuance of a transaction when notification of a DMA completion is received. The transaction instructs the I/O channel to enforce coherency and then responds back only after coherency has been ensured. Specifically, a DMA.sub.-- SYNC transaction is broadcast to all I/O channels in the system. Responsive thereto, each I/O channel writes back to memory any modified lines in its cache that might contain DMA data for a DMA sequence that was reported by the system as completed. The I/O channels have a reporting means to indicate when this transaction is completed, so that the DMA.sub.-- SYNC transaction does not have to complete in pipeline order. Thus, the I/O channel can issue new transactions before responding to the DMA.sub.-- SYNC transaction.
公开/授权文献
- USD425547S Label printer 公开/授权日:2000-05-23
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