An address generating and mapping device of a video capture system includes: a microprocessor having a counter counted by being synchronized with a horizontal synchronizing signal of a video signal, an address port for outputting an address to be used when reading from a memory, and a counter port for outputting the counter value and a bank selection signal by using predetermined higher bits among the counter output as the bank selection signal for selecting data banks of the memory; a counter for performing a predetermined operation according to a signal for selecting a mode, when a mode for generating an address necessary for storing the video signal is referred to as an address generating mode and a mode for mapping an address necessary for accessing the memory is referred to as an address mapping mode; multiplexers for outputting a counter value from the microprocessor to higher addresses of the memory when the mode selection signal is the address generating mode and outputting the addresses output from the microprocessor as higher addresses of the memory when the mode selection signal is the address mapping mode, and a bank selecting unit for outputting higher bits among the signals output from the counter built in the microprocessor as a signal for selecting the data banks of the memory when the mode selection signal is the address mapping mode. In the address generating mode, the counter counts the number corresponding to that of pixels constituting a horizontal line of the video signal to output as lower addresses of the memory and is cleared by a clear signal having the same frequency as that of the horizontal synchronizing signal of the video signal, and, in the address mapping mode, the counter connects address lines output from the microprocessor to lower address lines of the memory. The use of the mode selection signal can provide a simple address generating and mapping circuit for the video capture system.