发明授权
US6125058A System for optimizing the equalization pulse of a read sense amplifier
for a simultaneous operation flash memory device
失效
用于优化用于同时操作的闪存器件的读出读出放大器的均衡脉冲的系统
- 专利标题： System for optimizing the equalization pulse of a read sense amplifier for a simultaneous operation flash memory device
- 专利标题（中）： 用于优化用于同时操作的闪存器件的读出读出放大器的均衡脉冲的系统
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申请号： US421982申请日： 1999-10-19
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公开(公告)号： US6125058A公开(公告)日： 2000-09-26
- 发明人: Tiao-Hua Kuo , Nancy S. Leong , Takao Akaogi , Johnny C. Chen
- 申请人： Tiao-Hua Kuo , Nancy S. Leong , Takao Akaogi , Johnny C. Chen
- 申请人地址： CA Sunnyvale JPX Kanagawa
- 专利权人： Advanced Micro Devices, Inc.,Fujitsu Limited
- 当前专利权人： Advanced Micro Devices, Inc.,Fujitsu Limited
- 当前专利权人地址： CA Sunnyvale JPX Kanagawa
- 主分类号： G11C7/06
- IPC分类号： G11C7/06 ; G11C7/20 ; G11C16/28 ; G11C16/32 ; G11C29/02 ; G11C29/50 ; G11C16/06 ; G11C7/00
摘要：
A system for optimizing the equalization pulse of a read sense amplifier is disclosed. A number of capacitor circuits are provided that can be coupled to a timing circuit in a variety of combinations. The different combinations of coupled and decoupled capacitor circuits result in different durational lengths of the equalization pulse. A testing sequence determines the optimal durational length of the equalization pulse by testing the different combinations of coupled capacitors. The optimal combination is then permanently stored in attribute cells for optimizing the equalization pulse in normal operation.
公开/授权文献
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