Invention Grant
US6130135A Method of fabricating lightly-doped drain transistor having inverse-T
gate structure
失效
制造具有逆T栅极结构的轻掺杂漏极晶体管的方法
- Patent Title: Method of fabricating lightly-doped drain transistor having inverse-T gate structure
- Patent Title (中): 制造具有逆T栅极结构的轻掺杂漏极晶体管的方法
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Application No.: US81396Application Date: 1998-05-18
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Publication No.: US6130135APublication Date: 2000-10-10
- Inventor: Shye-Lin Wu
- Applicant: Shye-Lin Wu
- Applicant Address: TWX Hsin-Chu
- Assignee: Powerchip Semiconductor Corp.
- Current Assignee: Powerchip Semiconductor Corp.
- Current Assignee Address: TWX Hsin-Chu
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L21/336 ; H01L29/10 ; H01L29/423
Abstract:
A method of fabricating a lightly doped drain transistor having an inverse-T gate structure. A semiconductor substrate is provided to implement said method. After a gate dielectric layer is formed on the substrate, the step of sequentially forming a first amorphous silicon layer and a second amorphous silicon layer follows. Then, the second amorphous silicon layer is patterned to form a first electrode, and first spacers are formed on sidewalls of the first electrode. Lightly-doped layers are thereafter formed in the substrate, and thus the first amorphous silicon layer is patterned to form a second electrode. Both steps make use of the first electrode and the first spacers as masking. Subsequently, second spacers are formed to overlie the first spacers and sidewalls of the second electrode. After heavily-doped layers are formed in the substrate by using the first electrode and the second spacers as masking, the lightly-doped layers are driven in so as to be fully covered by the second electrode.
Public/Granted literature
- USD406485S Hammer holder Public/Granted day:1999-03-09
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