发明授权
US6133128A Method for patterning polysilicon gate layer based on a photodefinable
hard mask process
失效
基于光可定义硬掩模工艺图案化多晶硅栅极层的方法
- 专利标题： Method for patterning polysilicon gate layer based on a photodefinable hard mask process
- 专利标题（中）： 基于光可定义硬掩模工艺图案化多晶硅栅极层的方法
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申请号： US862申请日： 1997-12-30
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公开(公告)号： US6133128A公开(公告)日： 2000-10-17
- 发明人: Siddhartha Das , Chunlin Liang
- 申请人： Siddhartha Das , Chunlin Liang
- 申请人地址： CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： CA Santa Clara
- 主分类号： H01L21/28
- IPC分类号： H01L21/28 ; H01L21/3213 ; H01L21/336 ; H01L21/3205
摘要：
A process for patterning a gate of a semiconductor device is provided. A gate material layer is formed upon an oxide layer of a substrate. A photoresist layer is formed upon the gate material layer. A portion of the photoresist layer is photo-oxidized. The portion defines a gate pattern. The portion of the photoresist layer is converted into a hard mask. A portion of the gate material layer is patterned with the hard mask. The portion of the gate material layer defines a gate.
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