发明授权
US6140186A Method of forming asymmetrically doped source/drain regions 有权
形成不对称掺杂源极/漏极区域的方法

Method of forming asymmetrically doped source/drain regions
摘要:
Asymmetrically doped source/drain regions of a transistor are formed employing protective insulating layers to prevent a portion of the gate electrode from receiving an excessive impurity implantation dose and penetrating through the underlying gate insulating layer into the semiconductor substrate. Sidewall spacers are employed during heavy implantation.
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