发明授权
- 专利标题: Laminated-type varistor
- 专利标题(中): 层压型压敏电阻
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申请号: US219616申请日: 1998-12-23
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公开(公告)号: US6147587A公开(公告)日: 2000-11-14
- 发明人: Kenjiro Hadano , Tsuyoshi Kawada , Iwao Fukutani , Kazutaka Nakamura , Kuzuhiro Kaneko , Ryouichi Urahara
- 申请人: Kenjiro Hadano , Tsuyoshi Kawada , Iwao Fukutani , Kazutaka Nakamura , Kuzuhiro Kaneko , Ryouichi Urahara
- 申请人地址: JPX
- 专利权人: Murata Manufacturing Co., Ltd.
- 当前专利权人: Murata Manufacturing Co., Ltd.
- 当前专利权人地址: JPX
- 优先权: JPX9-367998 19971225
- 主分类号: H01C7/10
- IPC分类号: H01C7/10 ; H01C7/18
摘要:
A laminated-type varistor includes a laminated structure and a pair of external electrodes disposed on a surface of the laminated structure. The laminated structure includes effective sintered body layers and internal electrodes. The internal electrodes are connected to the external electrodes and are disposed apart from each other in the direction perpendicular to lamination surfaces. Each of the internal electrodes has a multilayer electrode structure in which a plurality of electrode layers are arranged in layers while an ineffective sintered body layer is disposed therebetween. The laminated-type varistor has increased maximum peak current and maximum energy and reduction in clamping voltage.
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