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    Barium titanate semiconductive ceramic
    1.
    发明授权
    Barium titanate semiconductive ceramic 有权
    钛酸钡半导体陶瓷

    公开(公告)号：US06472339B2

    公开(公告)日：2002-10-29

    申请号：US09157062

    申请日：1998-09-18

    申请人： Mitsutoshi Kawamoto ,  Hideaki Niimi ,  Ryouichi Urahara ,  Yukio Sakabe

    发明人： Mitsutoshi Kawamoto ,  Hideaki Niimi ,  Ryouichi Urahara ,  Yukio Sakabe

    IPC分类号： C04B35468

    CPC分类号： B82Y30/00 ,  C01G23/006 ,  C01P2002/50 ,  C01P2002/76 ,  C01P2002/77 ,  C01P2004/62 ,  C01P2004/64 ,  C04B35/4682

    摘要： The present invention provides barium titanate semiconductive ceramic having low specific resistance at room temperature and high withstand voltage, which fully satisfies the demand for enhancing withstand voltage. The average ceramic grain size of the barium titanate semiconductive ceramic is controlled to about 0.9 &mgr;m or less. By this control, the ceramic possesses low specific resistance at room temperature and high withstand voltage fully satisfying a recent demand for enhancing withstand voltage and may suitably used for applications such as controlling temperature and limiting current, or in exothermic devices for constant temperature. Accordingly, the barium titanate semiconductive ceramic enables an apparatus using the same to have enhanced performance and reduced size.

    摘要翻译： 本发明提供了在室温下具有低电阻率和高耐压的钛酸钡半导体陶瓷，其完全满足提高耐电压的要求。 钛酸钡半导体陶瓷的平均陶瓷粒径控制在0.9μm以下。 通过该控制，陶瓷在室温下具有低的电阻率和高耐受电压，完全满足了近来对提高耐受电压的要求，并且可以适用于诸如控制温度和限制电流的应用，或用于恒温的放热装置中。 因此，钛酸钡半导体陶瓷使得能够使用其的装置具有增强的性能和减小的尺寸。

    Laminated-type varistor
    2.
    发明授权
    Laminated-type varistor 失效
    层压型压敏电阻

    公开(公告)号：US6147587A

    公开(公告)日：2000-11-14

    申请号：US219616

    申请日：1998-12-23

    申请人： Kenjiro Hadano ,  Tsuyoshi Kawada ,  Iwao Fukutani ,  Kazutaka Nakamura ,  Kuzuhiro Kaneko ,  Ryouichi Urahara

    发明人： Kenjiro Hadano ,  Tsuyoshi Kawada ,  Iwao Fukutani ,  Kazutaka Nakamura ,  Kuzuhiro Kaneko ,  Ryouichi Urahara

    IPC分类号： H01C7/10 ,  H01C7/18

    CPC分类号： H01C7/18 ,  H01C7/10

    摘要： A laminated-type varistor includes a laminated structure and a pair of external electrodes disposed on a surface of the laminated structure. The laminated structure includes effective sintered body layers and internal electrodes. The internal electrodes are connected to the external electrodes and are disposed apart from each other in the direction perpendicular to lamination surfaces. Each of the internal electrodes has a multilayer electrode structure in which a plurality of electrode layers are arranged in layers while an ineffective sintered body layer is disposed therebetween. The laminated-type varistor has increased maximum peak current and maximum energy and reduction in clamping voltage.

    摘要翻译： 叠层型变阻器包括层压结构和设置在层叠结构的表面上的一对外部电极。 层叠结构包括有效的烧结体层和内部电极。 内部电极与外部电极连接，并且在与层叠面垂直的方向上彼此分离。 每个内部电极具有多层电极结构，其中多个电极层被布置成层，而其间设置无效的烧结体层。 叠层型压敏电阻具有增加的最大峰值电流和最大能量以及钳位电压的降低。

    Semiconductor ceramic and electronic element fabricated from the same
    3.
    发明授权
    Semiconductor ceramic and electronic element fabricated from the same 有权
    半导体陶瓷和电子元件由其制造

    公开(公告)号：US6153931A

    公开(公告)日：2000-11-28

    申请号：US262573

    申请日：1999-03-04

    申请人： Hideaki Niimi ,  Mitsutoshi Kawamoto ,  Akinori Nakayama ,  Satoshi Ueno ,  Ryouichi Urahara

    发明人： Hideaki Niimi ,  Mitsutoshi Kawamoto ,  Akinori Nakayama ,  Satoshi Ueno ,  Ryouichi Urahara

    IPC分类号： C04B35/46 ,  H01C7/02 ,  H01L31/0256 ,  C04B35/48 ,  C04B35/49 ,  H01L23/06

    CPC分类号： H01C7/025

    摘要： The present invention provides a barium titanate-based semiconducting ceramic which exhibits excellent PTC characteristic and which can be fired at a temperature lower than 1000.degree. C. The present invention also provides an electronic element fabricated from the ceramic. The semiconducting ceramic contains, in a semiconducting sintered barium titanate; boron oxide; an oxide of at least one of barium, strontium, calcium, lead, yttrium and a rare earth element; and an optional oxide of at least one of titanium, tin, zirconium, niobium, tungsten and antimony in which the atomic boron is0.005.ltoreq.B/.beta..ltoreq.0.50 and1.0.ltoreq.B/(.alpha.-.beta.).ltoreq.4.0wherein .alpha. represents the total number of atoms of barium, strontium, calcium, lead, yttrium and rare earth element contained in the semiconducting ceramic, and .beta. represents the total number of atoms of titanium, tin, zirconium, niobium, tungsten and antimony contained in the semiconducting ceramic.

    摘要翻译： 本发明提供一种钛酸钡系半导体陶瓷，其表现出优异的PTC特性，并可在低于1000℃的温度下烧制。本发明还提供了由陶瓷制成的电子元件。 半导体陶瓷在半导体烧结的钛酸钡中含有; 氧化硼 钡，锶，钙，铅，钇和稀土元素中的至少一种的氧化物; 和钛，锡，锆，铌，钨和锑中的至少一种的任选的氧化物，其中原子硼为0.005≤B/β= 0.50和1.0

    Material and paste for producing internal electrode of varistor, laminated varistor, and method for producing the varistor
    4.
    发明授权
    Material and paste for producing internal electrode of varistor, laminated varistor, and method for producing the varistor 有权
    用于制造变阻器内部电极的材料和糊料，层压变阻器，以及用于制造压敏电阻的方法

    公开(公告)号：US6147588A

    公开(公告)日：2000-11-14

    申请号：US271605

    申请日：1999-03-17

    申请人： Akinori Nakayama ,  Ryouichi Urahara ,  Yukio Sakabe

    发明人： Akinori Nakayama ,  Ryouichi Urahara ,  Yukio Sakabe

    IPC分类号： H01C7/10 ,  H01C7/112 ,  H01C7/18 ,  H01C7/13

    CPC分类号： H01C7/18 ,  H01C7/112

    摘要： The present invention provides a varistor which has low variation in electric characteristics and enhanced withstand electrostatic voltage and which can be fired at low temperature; as well as a method for producing the same. The laminated varistor comprises a sintered laminate formed by laminating alternating layers of semiconducting ceramic which comprises ZnO as a primary component and at least Bi oxide as a secondary component, and internal electrodes which predominantly comprise Pt and Pd as an inevitable impurity; and external electrodes maintaining electrical contact with the internal electrodes, wherein the Pd content is controlled to be about 0.1 wt. % or less based on the content of Pt, which is a primary component of the internal electrodes.

    摘要翻译： 本发明提供一种变阻器，其电特性变化小，抗静电电压提高，可在低温下烧制; 以及其制造方法。 层叠压敏电阻器包括通过将包含ZnO作为主要成分的交替层和至少Bi氧化物作为次要组分层叠的交替层和主要包含Pt和Pd作为不可避免的杂质的内部电极而形成的烧结层叠体。 以及与内部电极保持电接触的外部电极，其中Pd含量被控制在约0.1wt。 基于作为内部电极的主要成分的Pt的含量的％以下。