A non-linear digital-to-analog converter includes: a k bit parallel input; a decoding circuit having M inputs connected to M most significant bits of the parallel input, the decoding circuit being arranged to connect first and second consecutive reference inputs among 2.sup.m +1 reference inputs to first and second outputs, respectively, where M>m; and a variable resolution linear digital-to-analog converter having first and second reference inputs connected to the first and second outputs of the decoding circuit, respectively, and further having N digital inputs connected to N least significant bits of the parallel input, where (M+N)>k.