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公开(公告)号：US11581899B2
公开(公告)日：2023-02-14
申请号：US17408847
申请日：2021-08-23
发明人： Hiroshi Endo
摘要： An analog-to-digital converting device includes: a main analog-to-digital converter configured to convert an analog signal output from a sensor to a digital signal; and a monitoring unit configured to monitor the digital signal converted by the main analog-to-digital converter. The main analog-to-digital converter is provided by a special purpose IC arranged separately from a microcomputer for controlling the main analog-to-digital converter. The monitoring unit includes multiple sub analog-to-digital converters each of which having a conversion accuracy lower than that of the main analog-to-digital converter and converting the analog signal output from the sensor to a digital signal. The monitoring unit sets a predetermined threshold based on conversion values of the digital signals converted by the multiple sub analog-to-digital converters, and compares a conversion value of the digital signal converted by the main analog-to-digital converter with the predetermined threshold.
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公开(公告)号：US20220416807A1
公开(公告)日：2022-12-29
申请号：US17358131
申请日：2021-06-25
申请人： Intel Corporation
发明人： Ramon SANCHEZ , Kameran AZADET , Martin CLARA , Daniel GRUBER
摘要： A processing device is provided. The processing device comprises one or more interfaces configured to transmit information to a nonlinear device and processing circuitry configured to control the one or more interfaces and to. Further, the processing circuitry is configured to transmit an excitation signal to the nonlinear device and to receive response information from the nonlinear device. Further, the processing circuitry is configured to determine a linear response of the nonlinear device based on the response information and to determine a nonlinear response of the nonlinear device based on the determined linear response.
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公开(公告)号：US11424756B2
公开(公告)日：2022-08-23
申请号：US17007887
申请日：2020-08-31
发明人： Debapriya Sahu , Pranav Sinha , Meghna Agrawal
摘要： A successive approximation register (SAR) analog-to-digital converter includes a capacitive digital-to-analog converter (CDAC), a comparator, and a SAR control circuit. The comparator is coupled to an output of the CDAC. The SAR control circuit is coupled to an input of the CDAC and to an output of the comparator. The SAR control circuit is configured to provide a feedback signal to the CDAC. The CDAC is configured to apply the feedback signal to form an infinite impulse response filter.
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公开(公告)号：US20220131550A1
公开(公告)日：2022-04-28
申请号：US17483082
申请日：2021-09-23
发明人： Maher Mahmoud Sarraj
摘要： In described examples, a sample and hold circuit is configured to periodically connect one input of an op-amp to a reference voltage through a switch while a second input of the op-amp is connected to an output of the op-amp. Offset cancellation is performed by storing a sampled offset on a sampling capacitor coupled to the second input of the op-amp.
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公开(公告)号：US11316528B2
公开(公告)日：2022-04-26
申请号：US17154849
申请日：2021-01-21
申请人： Fluke Corporation
发明人： Denny E. Henson
摘要： A pulse width modulation (PWM) digital-to-analog conversion circuit includes switches 102, 104, 114, 116 controlled by a first PWM signal, and switches 106, 108, 110, 112 controlled by a second PWM signal. A first operational amplifier (op-amp) includes a first input coupled to an output of a filter, and a second input coupled to an output of the first op-amp. During a first time period, an output of a second op-amp is coupled to an input of the filter via switches 102 and 104, and an output of a third op-amp is coupled to the output of the first op-amp via switches 114 and 116. During a second time period, the output of the second op-amp is coupled to the output of the first op-amp via switches 106 and 108, and an output of the third op-amp is coupled to the input of the filter via switches 110 and 112.
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公开(公告)号：US11239851B2
公开(公告)日：2022-02-01
申请号：US16997975
申请日：2020-08-20
摘要： A system has a digital-to-analog converter; a reference signal coupled to the digital-to-analog converter; a differential amplifier for applying gain, and for generating output signals as a function of sampled input signals, the reference signal, digital codes, and the gain applied by the differential amplifier coupled to the digital-to-analog converter; and a multi-bit successive-approximation register for determining the digital codes in successive stages coupled to the differential amplifier; and the gain applied by the differential amplifier is corrected based on previously determined digital codes.
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公开(公告)号：US20220006468A1
公开(公告)日：2022-01-06
申请号：US17477712
申请日：2021-09-17
申请人： YAMAHA CORPORATION
发明人： Kenji ISHIZUKA
摘要： An amplifier performs analog amplification on a signal I_A with a gain corresponding to a state GS and outputs the amplified signal as a signal M_A. An ADC converts the signal M_A to a digital signal and outputs the digital signal as a signal M_D. Analog comparators and a down-determination unit detect that the signal M_A exceeds a first level, and cause the state GS to transition to a state of gain of the next lower stage. Digital comparators and an up-determination unit detect that the signal M_D has been continuously lower than a second level for a predetermined period, and cause the state GS to transition to a state of gain of the next higher stage. The restoration circuit performs digital amplification on the signal M_D with a gain corresponding to the gain of the amplifier and outputs the amplified signal as a signal O_D.
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8.发明申请公开(公告)号：US20210336629A1
公开(公告)日：2021-10-28
申请号：US17241450
申请日：2021-04-27
发明人： Houston Fortney
摘要： A measurement system includes a gain chain configured to amplify an analog input signal; a range selector configured to select a gain between the analog input signal and a plurality of analog-to-digital converter (ADC) outputs from a plurality of ADCs, wherein each ADC output has a path, and a gain of each output path is made up of a plurality of gain stages in the gain chain; and a mixer configured to combine the plurality of ADC outputs into a single mixed output.
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公开(公告)号：US11159170B1
公开(公告)日：2021-10-26
申请号：US17077439
申请日：2020-10-22
发明人： Maher Mahmoud Sarraj
摘要： In described examples, a sample and hold circuit is configured to periodically connect one input of an op-amp to a reference voltage through a switch while a second input of the op-amp is connected to an output of the op-amp. Offset cancellation is performed by storing a sampled offset on a sampling capacitor coupled to the second input of the op-amp.
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公开(公告)号：US11133764B2
公开(公告)日：2021-09-28
申请号：US16145423
申请日：2018-09-28
发明人： Ge Hu , Wenqing Bian
摘要： A signal converter, including: a power circuit, a microprocessor, a plurality of input signal interface circuits, a first multiplexer switch, and an output signal interface circuit. The power circuit supplies power for each circuit of the signal converter. The plurality of input signal interface circuits is disposed side by side, and in operation, one of the plurality of input signal interface circuits is connected to the first multiplexer switch to work. The plurality of input signal interface circuits includes input terminals and output terminals. The input terminals receive corresponding input signals, and the output terminals are connected to the microprocessor. The microprocessor includes an output terminal which is connected to the output signal interface circuit. The microprocessor controls the first multiplexer switch to connect to one of the plurality of input signal interface circuits.
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