发明授权
US06204691B1 FPGA with a plurality of input reference voltage levels grouped into sets
有权
FPGA具有多个输入参考电压电平分组成组
- 专利标题: FPGA with a plurality of input reference voltage levels grouped into sets
- 专利标题(中): FPGA具有多个输入参考电压电平分组成组
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申请号: US09569745申请日: 2000-05-11
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公开(公告)号: US06204691B1公开(公告)日: 2001-03-20
- 发明人: F. Erich Goetting , Scott O. Frake , Venu M. Kondapalli , Steven P. Young
- 申请人: F. Erich Goetting , Scott O. Frake , Venu M. Kondapalli , Steven P. Young
- 主分类号: H03K19094
- IPC分类号: H03K19094
摘要:
The invention comprises an FPGA having a plurality of input reference voltages and/or output voltage supplies. In one embodiment, two or more differential amplifiers in the same configurable input buffer use different input reference voltages. According to a second aspect of the invention, the I/O pad line is configurably connected to the input reference voltage line, so that any configurable Input/Output Block (IOB) can be used to supply the input reference voltage. According to a third aspect of the invention, the reference input of an I/O is configurably connected to any of two or more input reference voltage lines. According to another aspect of the invention, a single input reference voltage and/or a single output voltage supply is applied to each IOB, with the IOBs grouped into sets. Each set of IOBs has a separate input reference voltage and/or a separate output voltage supply.
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