A double recess crown-shaped DRAM capacitor is formed in a simplified process. A dielectric layer is formed over a substrate. Using photolithographic and etching techniques, a contact opening is formed in the dielectric layer. A conductive layer is formed over the dielectric layer filling the contact opening to form a conductive plug. A second dielectric layer is formed over the conductive layer. Again using photolithographic and etching techniques, the second dielectric layer is patterned to form a trapezoidal-shaped dielectric layer. An organic bottom anti-reflective coating (organic BARC) is coated over the trapezoidal-shaped dielectric layer and the conductive layer. Organic BARC above the trapezoidal-shaped dielectric layer is removed. Using the organic BARC as an etching mask, the trapezoidal-shaped dielectric layer is etched to form triangular-shaped dielectric layers and a trench in the conductive layer. The residual organic BARC is completely removed. Using the triangular-shaped dielectric layers as a hard etching mask, two types of trenches each having a different depth are formed in the conductive layer. The triangular-shaped dielectric layers are removed to form a double-recess lower electrode. Hemispherical silicon grains are grown over the interior surface of the double-recess lower electrode as well as the external sidewalls. Finally, a conformal dielectric layer and a conformal conductive layer are sequentially formed over the surface of the double-recess lower electrode.