An integrated circuit chip (10, 50, 100) may comprise an integrated circuit (14, 54, 108, 110, 112) formed in a semiconductor layer (12, 52, 102). A thermal contact (16, 56, 116) may be formed at a high temperature region of the integrated circuit (14, 54, 108, 110, 112). A thick plated metal layer (40, 80, 140) may be generally isolated from the integrated circuit (14, 54, 108, 110, 112). The thick plated metal layer (40, 80, 140) may include a base (42, 82, 142) and an exposed surface (44, 84, 144) opposite the base (42, 82, 142). The base (42, 82, 142) may be coupled to the thermal contact (16, 56, 116) to receive thermal energy of the high temperature region. The exposed surface (44, 84, 144) may dissipate thermal energy received by the thick plated metal layer (40, 80, 140).