发明授权
- 专利标题: Method for fabricating isolated anti-fuse structure
- 专利标题(中): 隔离反熔丝结构的制造方法
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申请号: US09389522申请日: 1999-09-02
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公开(公告)号: US06242335B1公开(公告)日: 2001-06-05
- 发明人: Joseph C. Sher , Robert M. Gravelle
- 申请人: Joseph C. Sher , Robert M. Gravelle
- 主分类号: H01L2900
- IPC分类号: H01L2900
摘要:
An improved anti-fuse structure is formed on a silicon substrate of a first conductivity type. The anti-fuse has a first conductive layer formed on a surface of the substrate, a dielectric layer formed on the first conductive layer, and a second conductive layer formed on the dielectric layer. The second conductive layer has a portion extending beyond the dielectric layer above the surface of the substrate. A third conductive layer is contacted to this portion of the second dielectric layer. The anti-fuse further includes a well region having a graded doping profile formed in the silicon substrate under the portion of the second conductive layer to which the third conductive layer is contacted. The well region has a second conductivity type that is opposite the first conductivity type.
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