An analog-to-digital converter which has a low resolution and high resolution mode. In response to the low resolution mode signal, a switching circuit selects only certain of the digital bit outputs. In one embodiment, the analog-to-digital converter is a pipelined circuit with a number of stages. In response to the low resolution mode, a number of the stages are bypassed, so that only the needed stages for the smaller number of bits are used. The stages that are bypassed are preferably powered down, but not completely. By maintaining a small amount of bias current to the bypassed stages, they can quickly respond when a switch is made back to full resolution mode.