发明授权
- 专利标题: Method for forming shallow trench isolation structures
- 专利标题(中): 形成浅沟槽隔离结构的方法
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申请号: US09588058申请日: 2000-06-06
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公开(公告)号: US06358785B1公开(公告)日: 2002-03-19
- 发明人: Sailesh Chittipeddi , Arun Kumar Nanda , Ankineedu Velaga
- 申请人: Sailesh Chittipeddi , Arun Kumar Nanda , Ankineedu Velaga
- 主分类号: H01L21338
- IPC分类号: H01L21338
摘要:
A method for forming a shallow trench isolation structure within a semiconductor substrate includes forming a trench opening within a semiconductor substrate having an oxidation-resistant material as a top surface. An oxide liner is formed on inner surfaces of the trench opening. A silicon material is then introduced into the trench opening and over the top surface. The silicon material is subsequently oxidized, either before or after a polishing operation is used to planarize the structure. Dishing related problems are avoided during polishing because the silicon or oxidized silicon material has a polishing rate similar to the oxidation resistant material, and less than that of conventionally formed CVD oxides.
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