发明授权
- 专利标题: Method of fabricating an isolation structure between a vertical transistor and a deep trench capacitor
- 专利标题(中): 在垂直晶体管和深沟槽电容器之间制造隔离结构的方法
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申请号: US09733888申请日: 2000-12-08
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公开(公告)号: US06368912B1公开(公告)日: 2002-04-09
- 发明人: Chi-Han Chang , Tzu-En He , Hsin-Chuan Tsai , Pei-Ing Lee
- 申请人: Chi-Han Chang , Tzu-En He , Hsin-Chuan Tsai , Pei-Ing Lee
- 主分类号: H01L318242
- IPC分类号: H01L318242
摘要:
A method of fabricating a horizontal isolation structure between a deep trench capacitor and a vertical transistor thereon is provided. A deep trench capacitor is in the bottom of a deep trench of a substrate. An insulating layer is formed to partially fill the deep trench and also on the substrate by high-density plasma chemical vapor deposition. The insulating layer on the sidewall of the deep trench and on the substrate is removed to transform the insulating layer in the deep trench to an isolation structure. An alternative approach is to form an insulating layer on the substrate and in the deep trench. Then a CMP is performed to remove the insulating layer on the substrate and an etching back is performed to remove the upper portion of the insulating layer in the deep trench. Then the remained insulating layer in the deep trench is served as an isolation structure between the deep trench capacitor and a vertical transistor thereron. The upper portion of the insulating layer in the alternative approach is also can be replaced by a low-cost sacrificial layer.
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