Method of fabricating an isolation structure between a vertical transistor and a deep trench capacitor
    1.
    发明授权
    Method of fabricating an isolation structure between a vertical transistor and a deep trench capacitor 有权
    在垂直晶体管和深沟槽电容器之间制造隔离结构的方法

    公开(公告)号:US06368912B1

    公开(公告)日:2002-04-09

    申请号:US09733888

    申请日:2000-12-08

    IPC分类号: H01L318242

    CPC分类号: H01L27/10864 H01L27/10876

    摘要: A method of fabricating a horizontal isolation structure between a deep trench capacitor and a vertical transistor thereon is provided. A deep trench capacitor is in the bottom of a deep trench of a substrate. An insulating layer is formed to partially fill the deep trench and also on the substrate by high-density plasma chemical vapor deposition. The insulating layer on the sidewall of the deep trench and on the substrate is removed to transform the insulating layer in the deep trench to an isolation structure. An alternative approach is to form an insulating layer on the substrate and in the deep trench. Then a CMP is performed to remove the insulating layer on the substrate and an etching back is performed to remove the upper portion of the insulating layer in the deep trench. Then the remained insulating layer in the deep trench is served as an isolation structure between the deep trench capacitor and a vertical transistor thereron. The upper portion of the insulating layer in the alternative approach is also can be replaced by a low-cost sacrificial layer.

    摘要翻译: 提供了一种在深沟槽电容器和垂直晶体管之间制造水平隔离结构的方法。 深沟槽电容器位于衬底的深沟槽的底部。 形成绝缘层以通过高密度等离子体化学气相沉积部分地填充深沟槽以及衬底上。 去除深沟槽和衬底的侧壁上的绝缘层,以将深沟槽中的绝缘层转变成隔离结构。 另一种方法是在衬底和深沟槽中形成绝缘层。 然后执行CMP以去除衬底上的绝缘层,并且执行蚀刻以去除深沟槽中的绝缘层的上部。 然后,深沟槽中保留的绝缘层用作深沟槽电容器和垂直晶体管之间的隔离结构。 替代方法中的绝缘层的上部也可以由低成本牺牲层代替。