发明授权
US06373108B1 Semiconductor device having reduced sheet resistance of source/drain regions
失效
源极/漏极区的薄层电阻降低的半导体器件
- 专利标题: Semiconductor device having reduced sheet resistance of source/drain regions
- 专利标题(中): 源极/漏极区的薄层电阻降低的半导体器件
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申请号: US09259336申请日: 1999-03-01
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公开(公告)号: US06373108B1公开(公告)日: 2002-04-16
- 发明人: Satoshi Yamakawa , Yasunori Tokuda , Takumi Nakahata , Taisuke Furukawa , Shigemitsu Maruno
- 申请人: Satoshi Yamakawa , Yasunori Tokuda , Takumi Nakahata , Taisuke Furukawa , Shigemitsu Maruno
- 优先权: JP10-259777 19980914
- 主分类号: H01L2976
- IPC分类号: H01L2976
摘要:
Source/drain diffusion regions are formed on the silicon substrate such that the source/drain diffusion regions sandwich a gate electrode from both sides on the silicon substrate. Sidewall oxide films are formed, one on each side surface of the gate electrode. Recessed portions are formed in the extension portions E beneath the sidewall oxide films. Source/drain electrodes are formed to fill the recessed portions. Thus, the sheet resistance of the respective regions including a pair of source/drain diffusion regions and source/drain electrodes is reduced, and a semiconductor device with a field-effect transistor having an improved current drivability is obtained.
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