Invention Grant
US06395591B1 Selective substrate implant process for decoupling analog and digital grounds 有权
用于解耦模拟和数字接地的选择性衬底植入工艺

Selective substrate implant process for decoupling analog and digital grounds
Abstract:
An integrated circuit fabrication process includes a selective substrate implant process to effectively decouple a first power supply connection from a second power supply connection while providing immunity against parasitic effects. In one embodiment, the selective substrate implant process forms heavily doped p-type regions only under P-wells in which noise producing circuitry are built. The noisy ground connection for these P-wells are decoupled from the quiet ground connection for others P-wells not connected to any heavily doped regions and in which noise sensitive circuitry are built. The selective substrate implant process of the present invention has particular applications in forming CMOS analog integrated circuits where it is important to decouple the analog ground for sensitive analog circuitry from the often noisy digital grounds of the digital and power switching circuitry.
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