发明授权
- 专利标题: Semiconductor memory device with address comparing functions
- 专利标题(中): 具有地址比较功能的半导体存储器件
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申请号: US09826004申请日: 2001-04-05
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公开(公告)号: US06404694B2公开(公告)日: 2002-06-11
- 发明人: Kazushige Ayukawa , Takao Watanabe , Susumu Narita
- 申请人: Kazushige Ayukawa , Takao Watanabe , Susumu Narita
- 主分类号: G11C800
- IPC分类号: G11C800
摘要:
A memory macro is a combination of functional modules such as a main amplifier module, memory bank modules of which each memory bank operates independently, a power source circuit, etc. The storage capacity of the memory macro can be easily changed from a large capacity to a small one by changing the number of the memory bank modules. A control circuit in the memory bank modules of the memory macro has an additional address comparing function. Therefore, the same page can be accessed at high speed without providing any control circuit outside the memory macro. In addition, a module having a function such as a memory access sequence control is provided and, when memory access is made, identification information is issued at the time of inputting/outputting address or data. Therefore, high-speed memory access can be realized by checking the coincidence between the data and address with the ID and controlling the memory access sequence so that the address inputting order and data outputting order can be changed.
公开/授权文献
- US20010014052A1 Semiconductor integrated circuit device 公开/授权日:2001-08-16
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