发明授权
- 专利标题: Method of fabricating a slot dual damascene structure without middle stop layer
- 专利标题(中): 制造无中间层的槽双镶嵌结构的方法
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申请号: US09778064申请日: 2001-02-07
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公开(公告)号: US06429116B1公开(公告)日: 2002-08-06
- 发明人: Fei Wang , Lynne A. Okada , Ramkumar Subramanian , Calvin T. Gabriel
- 申请人: Fei Wang , Lynne A. Okada , Ramkumar Subramanian , Calvin T. Gabriel
- 主分类号: H01L214763
- IPC分类号: H01L214763
摘要:
An interconnect structure and method of forming the same in which a diffusion barrier/etch stop layer is deposited over a conductive layer. An organic low k dielectric material is deposited over the diffusin barrier/etch stop layer to form a first dielectric layer. The first dielectric layer is etched to form a slot via in the first dielectric layer. An inorganic low k dielectric material is deposited within the slot via and over the first dielectric layer to form a second dielectric layer over the slot via and the first dielectric layer. The re-filled via is simultaneously etched with the second dielectric layer in which a trench is formed. The trench extends in a direction that is normal to the length of the slot via. The entire width of the trench is directly over the via. The re-opened via and the trench are filled with a conductive material.
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