发明授权
- 专利标题： High density interconnect multichip module stack and fabrication method
- 专利标题（中）： 高密度互连多芯片堆栈和制造方法
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申请号： US09681555申请日： 2001-04-27
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公开(公告)号： US06429381B1公开(公告)日： 2002-08-06
- 发明人: Richard Joseph Saia , Robert John Wojnarowski , Stanton Earl Weaver, Jr. , Kevin Matthew Durocher , Christopher James Kapusta , James Enrico Sabatini
- 申请人： Richard Joseph Saia , Robert John Wojnarowski , Stanton Earl Weaver, Jr. , Kevin Matthew Durocher , Christopher James Kapusta , James Enrico Sabatini
- 主分类号： H05K103
- IPC分类号： H05K103
摘要：
A method for fabricating a substrate package for a high density interconnect multichip module stack comprises: providing a substrate having holes extending therethrough and having a bottom surface with metallization situated thereon; providing a metal sheet having grooves extending therethrough; attaching the metal sheet to the bottom surface of the substrate; attaching metal plugs through the holes to the metal sheet; and removing portions of the substrate to expose the metal plugs and separate the metal sheet into a plurality of segments defined by the grooves.
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