发明授权
- 专利标题: High bandwidth 3D memory packaging technique
- 专利标题(中): 高带宽3D内存封装技术
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申请号: US09796055申请日: 2001-02-28
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公开(公告)号: US06469375B2公开(公告)日: 2002-10-22
- 发明人: William F. Beausoleil , Edmund D. Blackshear , Michael J. Ellsworth, Jr. , William F. Shutler , Norton J. Tomassetti
- 申请人: William F. Beausoleil , Edmund D. Blackshear , Michael J. Ellsworth, Jr. , William F. Shutler , Norton J. Tomassetti
- 主分类号: H01L2302
- IPC分类号: H01L2302
摘要:
A three-dimensional memory module in a repetitively used pedestal connector provides signal paths unique and common to the module at its level and signal paths from the level below unique to and common to modules at levels above. In order to provide a unique signal path from a substrate to each memory module, while using identical pedestal connectors at each level, signal lines are skewed from where they enter the bottom surface of the pedestal connector to where they exit the top surface. For example, each input in a line of inputs is connected to a matching line of outputs, but with a shift of one position between input and output.
公开/授权文献
- US20020117741A1 HIGH BANDWIDTH 3D MEMORY PACKAGING TECHNIQUE 公开/授权日:2002-08-29
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