发明授权
US06486857B1 Deflection correction circuit for narrowing a pull-in range of a VCO to reduce frequency variations in a horizontal synchronizing signal 失效
用于缩小VCO的拉入范围以减小水平同步信号中的频率变化的偏转校正电路

Deflection correction circuit for narrowing a pull-in range of a VCO to reduce frequency variations in a horizontal synchronizing signal
摘要:
There is disclosed a phase-locked loop (PLL) circuit for use in an improved deflection correction circuit for a larger and flat display device. The PLL circuit has a phase comparator circuit, a filter, and a voltage-controlled oscillator (VCO) connected in series in this order. The output signal from the VCO is fed back to the phase comparator circuit. The PLL circuit further includes a period-detecting circuit for detecting the period of an externally applied signal and a frequency divider circuit. This frequency divider circuit divides the frequency of the output signal from the VCO according to the period detected by the period-detecting circuit and feeds the resulting signal back to the VCO.
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