发明授权
- 专利标题： Pulsed circuit topology including a pulsed, domino flip-flop
- 专利标题（中）： 脉冲电路拓扑包括脉冲多米诺触发器
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申请号： US09608857申请日： 2000-06-30
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公开(公告)号： US06496038B1公开(公告)日： 2002-12-17
- 发明人: Milo D. Sprague , Rajesh Kumar , Robert J. Murray
- 申请人： Milo D. Sprague , Rajesh Kumar , Robert J. Murray
- 主分类号： H03K19096
- IPC分类号： H03K19096
摘要：
A pulsed circuit topology including a pulsed domino flip-flop. A circuit includes a domino logic gate having a domino output node responsive to input data during an evaluate pulse. Reset circuitry initiates and self-terminates a reset pulse during which the domino output node is precharged. A latch responsive to a first pulsed clock input signal is provided to latch data indicated at the domino output node.