- 专利标题: Semiconductor integrated circuit device and process for manufacturing the same
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申请号: US09988586申请日: 2001-11-20
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公开(公告)号: US06501115B2公开(公告)日: 2002-12-31
- 发明人: Makoto Yoshida , Katsuyuki Asaka , Toshihiko Takakura
- 申请人: Makoto Yoshida , Katsuyuki Asaka , Toshihiko Takakura
- 优先权: JP11-001570 19990107
- 主分类号: H01L2976
- IPC分类号: H01L2976
摘要:
A plurality of first contact holes reaching an n+-type semiconductor area used as the source of a MISFET employed in a logic-DRAM mixture LSI and a plurality of second contact holes reaching another n+-type semiconductor area used as the drain of the MISFET are bored through an insulation layer created over a gate electrode of the MISFET. A conductive film on the same layer as a bit line shunts the n+-type semiconductor area used as the source through the first contact holes. Another conductive film shunts the n+-type semiconductor area used as the drain through the second contact holes.
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