Invention Grant
- Patent Title: Method of fabricating an integrated circuit configuration with at least one capacitor
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Application No.: US10093039Application Date: 2002-03-07
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Publication No.: US06548350B2Publication Date: 2003-04-15
- Inventor: Bernhard Sell , Dirk Schumann , Josef Willer
- Applicant: Bernhard Sell , Dirk Schumann , Josef Willer
- Priority: DE19942680 19990907
- Main IPC: H01L218242
- IPC: H01L218242

Abstract:
The capacitor is arranged on the surface of a substrate. A first capacitor electrode has a middle part and a side part, which point vertically upwards, are arranged beside each other and are connected with each other via an upper part located above said middle part and said side part. The middle part is longer than the side part and is connected with other components of the circuit configuration located below said middle part and said side part. The first capacitor electrode is provided with a capacitor dielectric. A second capacitor electrode borders the capacitor dielectric.
Public/Granted literature
- US20020137280A1 Method of fabricating an integrated circuit configuration with at least one capacitor Public/Granted day:2002-09-26
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