- 专利标题: Simultaneous formation of charge storage and bitline to wordline isolation
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申请号: US10223195申请日: 2002-08-19
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公开(公告)号: US06555436B2公开(公告)日: 2003-04-29
- 发明人: Mark T. Ramsbey , Jean Y. Yang , Hidehiko Shiraiwa , Michael A. Van Buskirk , David M. Rogers , Ravi Sunkavalli , Janet Wang , Narbeh Derhacobian , Yider Wu
- 申请人: Mark T. Ramsbey , Jean Y. Yang , Hidehiko Shiraiwa , Michael A. Van Buskirk , David M. Rogers , Ravi Sunkavalli , Janet Wang , Narbeh Derhacobian , Yider Wu
- 主分类号: H01L21336
- IPC分类号: H01L21336
摘要:
One aspect of the present invention relates to a method of forming a non-volatile semiconductor memory device, involving the sequential or non-sequential steps of forming a charge trapping dielectric over a substrate, the substrate having a core region and a periphery region; removing at least a portion of the charge trapping dielectric in the periphery region; forming a gate dielectric in the periphery region; forming buried bitlines in the core region; and forming gates in the core region and the periphery region.
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