Invention Grant
- Patent Title: Semiconductor integrated circuit device
- Patent Title (中): 半导体集成电路器件
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Application No.: US09774717Application Date: 2001-02-01
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Publication No.: US06586807B2Publication Date: 2003-07-01
- Inventor: Akio Nishida , Noriyuki Yabuoshi , Yasuko Yoshida , Kazuhiro Komori , Sousuke Tsuji , Hideo Miwa , Mitsuhiro Higuchi , Koichi Imato
- Applicant: Akio Nishida , Noriyuki Yabuoshi , Yasuko Yoshida , Kazuhiro Komori , Sousuke Tsuji , Hideo Miwa , Mitsuhiro Higuchi , Koichi Imato
- Priority: JP2000-024465 20000201
- Main IPC: H01L2976
- IPC: H01L2976

Abstract:
A gate electrode of each MISFET is formed on a substrate in an active region whose periphery is defined by an element isolation trench, and crosses the active region so as to extend from one end thereof to the other end thereof. The gate electrode has a gate length in a boundary region defined between the active region and the element isolation trench which is greater than a gate length in a central portion of the active region. The gate electrode is configured in an H-type flat pattern. Further, the gate electrode covers the whole of one side extending along a gate-length direction, of the boundary region defined between the active region L and the element isolation trench, and parts of two sides thereof extending along a gate-width direction. The MISFETs are formed in electrically separated wells and are connected in series to constitute part of a reference voltage generating circuit.
Public/Granted literature
- US20010011753A1 Semiconductor integrated circuit device and method of manufacturing thereof Public/Granted day:2001-08-09
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