- 专利标题: Semiconductor integrated circuit device and manufacturing method thereof
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申请号: US10029895申请日: 2001-12-21
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公开(公告)号: US06590273B2公开(公告)日: 2003-07-08
- 发明人: Shigeaki Okawa , Toshiyuki Ohkoda
- 申请人: Shigeaki Okawa , Toshiyuki Ohkoda
- 优先权: JP2000-392221 20001225
- 主分类号: H01L2900
- IPC分类号: H01L2900
摘要:
In the semiconductor integrated circuit device, a first P+ type buried layer formed as an anode region and an N+ type diffused region formed in a cathode region are spaced from each other in the direction of the depth. This makes it possible to provide a semiconductor integrated circuit device in which a large depletion layer forming region can be provided in an N type region at a PN junction formed by first and second epitaxial layers and when a reverse bias voltage is applied to a diode element and in which a withstand voltage can be maintained by a depletion layer thus formed to prevent breakdown of elements in the device attributable to a breakdown current.
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