Method for low topography semiconductor device formation
摘要:
A method for forming a planarized field effect transistor (FET) is disclosed. In an exemplary embodiment of the invention, the method includes defining an active semiconductor region upon a substrate, the active semiconductor region further comprising a pair of mesa regions therein. A source region is defined within a top surface of one of the pair of mesa regions, and a drain region is defined within a top surface of the other of the pair of mesa regions. Then, a gate material is deposited between the pair of mesa regions, and the gate material is planarized to form a gate. Thereby, a top surface of the gate is substantially planar with the source and drain regions.
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