Multi-layered substrate with a built-in capacitor design and a method of making the same

Invention Grant

US06653574B2 Multi-layered substrate with a built-in capacitor design and a method of making the same 失效

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Patent Title: Multi-layered substrate with a built-in capacitor design and a method of making the same
Application No.: US09935913

Application Date: 2001-08-23
Publication No.: US06653574B2

Publication Date: 2003-11-25
Inventor: Chen-Wen Tsai , Chung-Ju Wu , Wei-Feng Lin
Applicant: Chen-Wen Tsai , Chung-Ju Wu , Wei-Feng Lin
Main IPC: H05K116
IPC: H05K116

Multi-layered substrate with a built-in capacitor design and a method of making the same

Abstract:

A multi-layered substrate having built-in capacitors is disclosed. The substrate comprises at least one high permittivity of dielectric material filled in the through holes between the power plane and the ground plane so as to form capacitors. The built in capacitors are to decouple high frequency noise due to the voltage fluctuation.

Public/Granted literature

US20020054467A1 Multi-layered substrate with a built-in capacitor design and a method of making the same Public/Granted day:2002-05-09

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