Abstract:
A method for fabricating a thermally enhanced semiconductor package including the steps of providing a substrate having a first surface and a second surface; providing a die on the first surface of the substrate and electrically connecting the die with the substrate; placing the die, the substrate, and a heat slug in a mold cavity defined by a mold cast, the mold cast having a protruding portion that touches the periphery on the surface of the heat slug, wherein the contact area is defined as a periphery region and the non-contact area enclosed by the periphery region is defined as a central region; and encapsulating the die and the heat slug by molding materials, wherein the periphery region and the central region of the heat slug are exposed to the ambient air.
Abstract:
A conductive structure for electronic device includes at least a first conductor, at least a second conductor and a conductive material for connecting the first conductor and the second conductor.
Abstract:
A packaging structure and an assembly method are disclosed. A packaging structure includes a substrate, a die, conductive wires, and conductively filled material. The substrate includes a conductive structure, and the conductive wires are insulator-coated. The die is mounted on the substrate, and the conductive wires are connected between the die and the conductive structure. The conductively filled material is formed among the conductive wires. In the assembly method, the die is firstly mounted on the substrate, followed by connecting the conductive wires between the die and the conductive structure, and finally forming the conductively filled material among the conductive wires.
Abstract:
An integrated circuit package capable of improving signal quality is disclosed. The integrated circuit package comprises a first substrate, an integrated circuit chip attached on the first surface of the first substrate. This integrated circuit package further comprises a plurality of external terminals mounted on the first substrate and a plurality of first bonding pads mounted on the edge portion of the first surface of the first substrate and respectively connected to the corresponding external terminals. Also, the integrated circuit package further comprises a second substrate and a plurality of second bonding pads mounted on the second surface of the second substrate and connected to the first bonding pads formed on the first substrate. Furthermore, this integrated circuit package further comprises a plurality of passive components disposed on the second substrate.
Abstract:
An apparatus for reducing an electrical noise inside a ball grid array package is disclosed. The apparatus mainly comprises a substrate, a plurality of solder balls and a plurality of inside-connected capacitors. The substrate includes a contact layer, a power plane and a ground plane. The plurality of solder balls are fixed on the contact layer. The plurality of inside-connected capacitors are fixed on the contact layer, and a conductive glue is used to electrically connect the capacitors to the power plane and ground plane to reduce the electrical noise between the power plane and ground plane.
Abstract:
A method of allocating registers for a processor based on cycle information is disclosed. The processor comprises a first cluster and a second cluster. Each cluster comprises a first functional unit, a second functional unit, a first local register file connected to the first functional unit, a second local register file connected to the second register file, and a global register file having a ping-pong structure formed by a first register bank and a second register bank. After building a Component/Register Type Associated Data Dependency Graph (CRTA-DDG), a functional unit assignment, register file assignment, ping-pong register bank assignment, and cluster assignment are performed to take full advantage of the properties of a processor as well as cycle information.
Abstract:
A method for copy propagations of a processor including two clusters, each cluster comprising a first function unit and a second function unit, a first local register file and a second local register file being respectively accessible by the first and second function unit only, and a global register file having a ping-pong structure to access the first and second local register files, the method comprising the steps of: (a) listing possible copy propagation paths between two nodes of a data flow graph; (b) calculating a profit of machine cycles for each of the copy propagation paths according to constraints of the processor; and (c) performing a copy propagation through the copy propagation path if the profit thereof is greater than a threshold value.
Abstract:
This disclosure presents a heat dissipation mechanism, which conducts generated heat of a thermal device to the housing of an electronic apparatus by a metal piece fastened between the thermal device and electronic apparatus, and then dissipates heat into the air through multiple holes opened over an apparatus shell. Besides, the presented mechanism is also suitable to mini-size, portable electronic apparatus to solve the thermal dissipation technique thereof.
Abstract:
A substrate used in a semiconductor device. The substrate includes a first wiring layer, a second wiring layer, and an interconnection-wiring layer. The first wiring layer includes a plurality of first pads, and the second wiring layer includes a plurality of second pads. The interconnection-wiring layer is set between the first and second wiring layer. In this case, at least one of the second pads that does not electrically connect to anyone of the first pads electrically connects to the interconnection-wiring layer. In another case, a shielding portion, which electrically connects the interconnection-wiring layer, is provided around the second pad that doesn't electrically connect to anyone of the first pads. Furthermore, this invention also discloses a semiconductor device including the substrate.
Abstract:
A structure of IC packaging and a method forming the same are disclosed in the present invention. This structure of IC packaging comprises a substrate, a chip, and a plurality of copper connecting wires. At least a conductive structure is made on the substrate and an isolating material is coated on the copper connecting wires. The chip is fastened on the substrate and electrically connected with the conductive structure by the copper conductive wires coated with isolating material.