发明授权
- 专利标题: Elevated source/drain field effect transistor and method for making the same
- 专利标题(中): 提高源/漏场效应晶体管及其制作方法
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申请号: US10070478申请日: 2002-05-02
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公开(公告)号: US06677212B1公开(公告)日: 2004-01-13
- 发明人: Fumiyoshi Yoshioka , Masayuki Nakano , Hiroshi Iwata
- 申请人: Fumiyoshi Yoshioka , Masayuki Nakano , Hiroshi Iwata
- 优先权: JP11/252892 19990907
- 主分类号: H01L27108
- IPC分类号: H01L27108
摘要:
A gate oxide film (23), a gate electrode (24) and a gate cap insulating film (25) are stacked on an active region of a p-type semiconductor substrate (21), and an insulating side wall (29) is formed, followed by BF2 ion implantation. Thus, a surface of the p-type semiconductor substrate becomes amorphous so that single-crystal silicon is prevented from epitaxially growing in the next process of depositing polysilicon (33). Halo regions (32) are formed using the BF2 ions having the opposite conductivity to a source/drain to reduce the short-channel effect. The substrate is then passed through a nitrogen purge chamber having a dew point kept at −100° C. to remove water molecules completely, and polysilicon (33) is deposited. Because native oxide is prevented from growing at an interface between the active region and the polysilicon, source/drain regions (34) formed later by implantation and diffusion of n-type impurity ions achieve a uniform junction depth.
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