发明授权
US06697888B1 Buffering and interleaving data transfer between a chipset and memory modules
有权
在芯片组和存储器模块之间缓冲和交织数据传输
- 专利标题: Buffering and interleaving data transfer between a chipset and memory modules
- 专利标题(中): 在芯片组和存储器模块之间缓冲和交织数据传输
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申请号: US09675304申请日: 2000-09-29
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公开(公告)号: US06697888B1公开(公告)日: 2004-02-24
- 发明人: John B. Halbert , Jim M. Dodd , Chung Lam , Randy M. Bonella
- 申请人: John B. Halbert , Jim M. Dodd , Chung Lam , Randy M. Bonella
- 主分类号: G06F300
- IPC分类号: G06F300
摘要:
Providing electrical isolation between the chipset and the memory data is disclosed. The disclosure includes providing at least one buffer in a memory interface between a chipset and memory modules. Each memory module includes a plurality of memory ranks. The buffers allow the memory interface to be split into first and second sub-interfaces. The first sub-interface is between the chipset and the buffers. The second sub-interface is between the buffers and the memory modules. The method also includes interleaving output of the buffers, and configuring the buffers to properly latch the data being transferred between the chipset and the memory modules. The first and second sub-interfaces operate independently but in synchronization with each other.