发明授权
US06717583B2 Data processor having unified memory architecture providing priority memory access
失效
数据处理器具有统一的存储器架构，提供优先存储器
- 专利标题： Data processor having unified memory architecture providing priority memory access
- 专利标题（中）： 数据处理器具有统一的存储器架构，提供优先存储器
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申请号： US09991705申请日： 2001-11-26
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公开(公告)号： US06717583B2公开(公告)日： 2004-04-06
- 发明人: Tetsuya Shimomura , Shigeru Matsuo , Koyo Katsura , Tatsuki Inuzuka , Yasuhiro Nakatsuka
- 申请人： Tetsuya Shimomura , Shigeru Matsuo , Koyo Katsura , Tatsuki Inuzuka , Yasuhiro Nakatsuka
- 优先权： JP8-258725 19960930; JP9-13732 19970128
- 主分类号： G06F15167
- IPC分类号： G06F15167
摘要：
In order to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer, when an access request to the memory 200 is generated from the CPU 310, the memory controller 400 holds it once, requests the display controller 560 to stop the access to the memory 200 which is in execution, when data to the access executed already is transferred from the memory 200, holds it, and transfers the access request from the CPU bus 310 which is held by the memory 200. When the access from the CPU bus 310 ends, the memory controller 400 restarts the access stopped in the display controller 560 and passes the held data to the display controller 560.