公开(公告)号：US07333116B2

公开(公告)日：2008-02-19

申请号：US11182944

申请日：2005-07-18

申请人： Tetsuya Shimomura ,  Shigeru Matsuo ,  Koyo Katsura ,  Tatsuki Inuzuka ,  Yasuhiro Nakatsuka

发明人： Tetsuya Shimomura ,  Shigeru Matsuo ,  Koyo Katsura ,  Tatsuki Inuzuka ,  Yasuhiro Nakatsuka

IPC分类号： G09G5/39 ,  G09G5/36 ,  G06F13/14 ,  G06F15/167

CPC分类号： G09G5/001 ,  G06F13/1673 ,  G06F13/18 ,  G09G5/02 ,  G09G5/363 ,  G09G5/393 ,  G09G5/395 ,  G09G2340/02 ,  G09G2360/121 ,  G09G2360/125 ,  G09G2360/128

摘要： In order to reduce degradation of the processing performance of the data processor due to use of a part of the main memory as a display frame buffer, when an access request to the memory 200 is generated from the CPU 310, the memory controller 400 holds it once, requests the display controller 560 to stop the access to the memory 200 which is in execution, when data to the access executed already is transferred from the memory 200, holds it, and transfers the access request from the CPU bus 310 which is held by the memory 200. When the access from the CPU bus 310 ends, the memory controller 400 restarts the access stopped in the display controller 560 and passes the held data to the display controller 560.

摘要翻译： 为了减少由于使用主存储器的一部分作为显示帧缓冲器而导致的数据处理器的处理性能的劣化，当从CPU 310产生对存储器200的访问请求时，存储器控制器400保持 一旦请求显示控制器560停止对正在执行的存储器200的访问，当已经从存储器200传送已经执行的访问的数据时，显示控制器560保持它，并且从被保持的CPU总线310传送访问请求 由存储器200。 当CPU总线310的访问结束时，存储器控制器400重启在显示控制器560中停止的访问，并将保持的数据传送到显示控制器560。

公开(公告)号：USRE39529E1

公开(公告)日：2007-03-27

申请号：US09536646

申请日：2000-03-28

申请人： Koyo Katsura ,  Shinichi Kojima ,  Noriyuki Kurakami

发明人： Koyo Katsura ,  Shinichi Kojima ,  Noriyuki Kurakami

IPC分类号： G09G5/39

CPC分类号： G09G5/393

摘要： A Memory Interface and Video Attribute Controller (MIVAC) is inserted between a dynamic RAM (DRAM) capable of a consecutive data read operation, such as the operation associated with the static column mode, page mode, or nibble mode, and a graphic processor to provide a parallel data processing. A serial data transfer is executed on each data bus between the MIVAC and the DRAM, whereas parallel data transfer is conducted between the MIVAC and the graphic processor. As a result, the graphic processor can be configured with a reduced number of DRAMs so that the graphic processor operates without paying attention to the consecutive data read mode of the DRAM.

摘要翻译： 存储器接口和视频属性控制器（MIVAC）插入在能够进行连续数据读取操作的动态RAM（DRAM）之间，诸如与静态列模式，页面模式或半字节模式相关联的操作，以及图形处理器 提供并行数据处理。 在MIVAC和DRAM之间的每个数据总线上执行串行数据传输，而在MIVAC和图形处理器之间进行并行数据传输。 结果，图形处理器可以被配置为具有减少数量的DRAM，使得图形处理器在不关注DRAM的连续数据读取模式的情况下操作。

公开(公告)号：US06751605B2

公开(公告)日：2004-06-15

申请号：US09789820

申请日：2001-02-22

申请人： Keiko Gunji ,  Koyo Katsura ,  Soshiro Kuzunuki ,  Masaki Miura ,  Toshimi Yokota

发明人： Keiko Gunji ,  Koyo Katsura ,  Soshiro Kuzunuki ,  Masaki Miura ,  Toshimi Yokota

IPC分类号： G06F1730

CPC分类号： G06K9/72 ,  G06K2209/01 ,  Y10S707/99931 ,  Y10S707/99933

摘要： A character recognition apparatus for inferring the entire character string solely from a user-input handwritten keyword and displaying the inferred result as a candidate character string. The apparatus of the invention comprises: a word string includes a word hierarchy and for recognizing each of the words within the hierarchy; a character transition probability table a4 storing probabilities of transitions from any one character to another, and those pieces of the word identification information which correspond to combinations of characters resulting from the transitions; and an optimization unit for using the character transition probability table in optimizing candidate character strings obtained by a recognition unit. The word dictionary is searched for a word defined by the word identification information which corresponds to the optimized candidate character string, whereby the searched word is retrieved which applies to the hierarchy information and which has yet to be input.

摘要翻译： 一种字符识别装置，用于仅从用户输入的手写关键词中推断出整个字符串，并将推测的结果显示为候选字符串。本发明的装置包括：字串包括字层级，并用于识别每个字 在层次结构中 存储从任何一个字符到另一个字符的转换概率的字符转换概率表a4，以及对应于由转换产生的字符的组合的那些字识别信息; 以及优化单元，用于在通过识别单元获得的优化候选字符串中使用字符转换概率表。 搜索单词词典由对应于优化的候选字符串的单词识别信息定义的单词，由此检索适用于层级信息并且尚未被输入的搜索词。

公开(公告)号：US06697070B1

公开(公告)日：2004-02-24

申请号：US09454590

申请日：1999-12-07

申请人： Koyo Katsura ,  Shigeru Matsuo ,  Shigeaki Yoshida ,  Hiroshi Takeda ,  Hisashi Kaziwara

发明人： Koyo Katsura ,  Shigeru Matsuo ,  Shigeaki Yoshida ,  Hiroshi Takeda ,  Hisashi Kaziwara

IPC分类号： G06T1100

CPC分类号： G09G5/26 ,  G09G5/393

摘要： A graphic processing system has a processor for managing a display area and a character font area both include within an are disposed in the address space. From coded information indicative of a character transferred through a data bus of the system, the processor generates an address at which a character font pattern of the corresponding character has been stored and transfers that character font pattern to a predetermined position on the display area. The graphic processing system realizes high speed development of fonts.

摘要翻译： 图形处理系统具有用于管理显示区域的处理器和包括在地址空间内的字符字体区域。 从指示通过系统的数据总线传送的字符的编码信息中，处理器生成相应字符的字符字体图案已被存储的地址，并将该字符字体图案转移到显示区域上的预定位置。 图形处理系统实现了字体的高速发展。

公开(公告)号：US06677950B1

公开(公告)日：2004-01-13

申请号：US08996151

申请日：1997-12-22

申请人： Mamoru Ohba ,  Mitsuru Watabe ,  Rika Minami ,  Koyo Katsura

发明人： Mamoru Ohba ,  Mitsuru Watabe ,  Rika Minami ,  Koyo Katsura

IPC分类号： G06T1500

CPC分类号： G06T11/203

摘要： To reduce the hardware of the graphics computer in size and reduce the cost of the hardware, the frame buffer and the main memory are united into one unit to process graphics data in the CPU. The frame buffer is arranged in the main memory, and the graphics computer includes a DMAC used to read pixel data from the frame buffer for display, a display used to receive the pixel data and display it on a display device, such as an LCD, etc., and memories used to store the procedure used by the CPU to draw the pixel data in the said frame buffer. Especially, the said memories are formed so that a single function procedure and 2 multifunction procedure can be selected to suit the drawing object. In addition, the single function procedure includes 2 line drawing procedure that uses data tables and 2 multivalue expansion procedure that uses a pattern table and a mask table. Since the frame buffer and the main memory are united into one unit, the CPU can be used to process graphics data. Thus, the graphics computer hardware is reduced in size and the cost of the hardware is reduced.

摘要翻译： 为了减小图形计算机的硬件尺寸并降低硬件成本，将帧缓冲器和主存储器联合成一个单元来处理CPU中的图形数据。 帧缓冲器布置在主存储器中，并且图形计算机包括用于从帧缓冲器读取像素数据以进行显示的DMAC，用于接收像素数据并将其显示在诸如LCD的显示设备上的显示器， 以及用于存储CPU使用的程序来绘制所述帧缓冲器中的像素数据的存储器。 特别地，所述存储器被形成为使得可以选择单个功能过程和2多功能过程以适合绘图对象。 另外，单功能过程包括使用数据表的2行绘图过程和使用模式表和掩码表的2多值扩展过程。 由于帧缓冲器和主存储器被组合成一个单元，所以CPU可以用于处理图形数据。 因此，图形计算机硬件的尺寸减小，硬件的成本降低。

公开(公告)号：US06433782B1

公开(公告)日：2002-08-13

申请号：US08894786

申请日：1997-08-28

申请人： Yasuhiro Nakatsuka ,  Shigeru Matsuo ,  Jun Satoh ,  Masanori Miyoshi ,  Koyo Katsura ,  Takashi Sone

发明人： Yasuhiro Nakatsuka ,  Shigeru Matsuo ,  Jun Satoh ,  Masanori Miyoshi ,  Koyo Katsura ,  Takashi Sone

IPC分类号： G06T1550

CPC分类号： G06T1/60 ,  G06T11/40 ,  G06T15/50 ,  G06T15/80

摘要： In a data processor and a shading apparatus used in the data processor, the data processor selects an address based on the information of a memory or a translation look-aside buffer. Therefore, even when the same data are accessed, a different address at high speed is adopted according to the hardware, object to be processed, processing, etc. A plurality of geometric vectors are given as the parameters for the vertexes of a picture, the vectors are interpolated in the picture, and the luminance of each small area in the figure is calculated using the vectors generated by the interpolation. Therefore, a spotlight or highlight can be expressed with high accuracy and at high speed even when the amount of the hardware and the extent of the picture are small.

摘要翻译： 在数据处理器中使用的数据处理器和着色装置中，数据处理器根据存储器或翻译后备缓冲器的信息来选择一个地址。 因此，即使在访问相同的数据的情况下，也可以根据硬件，被处理对象，处理等来采用高速的不同的地址。作为图像的顶点的参数，给出多个几何矢量， 矢量被内插在图像中，并且使用通过内插生成的矢量来计算图中每个小区域的亮度。 因此，即使当硬件的数量和图像的程度小时，也可以高精度和高速度地表现聚光灯或高光。

公开(公告)号：US06377267B1

公开(公告)日：2002-04-23

申请号：US09593496

申请日：2000-06-14

申请人： Koyo Katsura ,  Yasushi Fukunaga ,  Ryo Fujita ,  Kazuyoshi Koga ,  Takehiko Nishida

发明人： Koyo Katsura ,  Yasushi Fukunaga ,  Ryo Fujita ,  Kazuyoshi Koga ,  Takehiko Nishida

IPC分类号： G06F1300

CPC分类号： G06F3/14 ,  G09G5/001 ,  G09G5/363 ,  G09G5/39 ,  G09G5/393 ,  G09G2360/127

摘要： A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column addresses within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.

摘要翻译： 一种用于生成，显示或打印字符和图形数据的图形处理装置。 使用连续的列访问，其中指定行地址用于访问存储器，并且连续地访问指定的相同行地址内的不同列地址中的数据，以及缓冲装置，用于在处理器的访问和 提供对内存的访问。 用于显示的程序和图像信息存储在主存储器中。 帧缓冲器和主存储器的整体结构简单，体积小。

公开(公告)号：US06288728B1

公开(公告)日：2001-09-11

申请号：US09583721

申请日：2000-05-30

申请人： Jun Satoh ,  Kazushige Yamagishi ,  Keisuke Nakashima ,  Koyo Katsura ,  Takashi Miyamoto ,  Mitsuru Watabe ,  Kenichiroh Ohmura

发明人： Jun Satoh ,  Kazushige Yamagishi ,  Keisuke Nakashima ,  Koyo Katsura ,  Takashi Miyamoto ,  Mitsuru Watabe ,  Kenichiroh Ohmura

IPC分类号： G06F1576

CPC分类号： G09G5/393 ,  G06F1/04 ,  G06F1/12 ,  G06F12/0207 ,  G06F13/1689 ,  G06F13/4243 ,  G06F15/7832 ,  G06T1/60 ,  G09G5/001 ,  G09G5/395 ,  G09G5/399 ,  G09G2320/0252 ,  G09G2350/00 ,  G09G2360/128 ,  G09G2370/10 ,  G11C8/04 ,  G11C8/06 ,  G11C8/10 ,  G11C8/12 ,  G11C8/18

摘要： A data processor comprising: a bus control circuit adapted to be interfaced with a synchronous DRAM which can be accessed in synchronism with a clock signal; a plurality of data processing modules coupled to said bus control circuit for producing data and addresses for accessing a memory; and a clock driver for feeding intrinsic operation clocks to said data processing modules and for feeding the clock signal for accessing said memory in synchronism with the operations of said data processing modules to be operated by the operation clock signals, to the outside.

摘要翻译： 一种数据处理器，包括：总线控制电路，适于与可与时钟信号同步地访问的同步DRAM接口; 耦合到所述总线控制电路的多个数据处理模块，用于产生访问存储器的数据和地址; 以及时钟驱动器，用于将本征操作时钟馈送到所述数据处理模块，并且用于馈送用于与所述操作时钟信号操作的所述数据处理模块的操作同步地访问所述存储器的时钟信号。

公开(公告)号：US06222563B1

公开(公告)日：2001-04-24

申请号：US09327355

申请日：1999-06-08

申请人： Koyo Katsura ,  Yasushi Fukunaga ,  Ryo Fujita ,  Kazuyoshi Koga ,  Takehiko Nishida

发明人： Koyo Katsura ,  Yasushi Fukunaga ,  Ryo Fujita ,  Kazuyoshi Koga ,  Takehiko Nishida

IPC分类号： G06F15167

CPC分类号： G06F3/14 ,  G09G5/001 ,  G09G5/363 ,  G09G5/39 ,  G09G5/393 ,  G09G2360/127

摘要： A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column addresses within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.

摘要翻译： 一种用于生成，显示或打印字符和图形数据的图形处理装置。 使用连续的列访问，其中指定行地址用于访问存储器，并且连续地访问指定的相同行地址内的不同列地址中的数据，以及缓冲装置，用于在处理器的访问和 提供对内存的访问。 用于显示的程序和图像信息存储在主存储器中。 帧缓冲器和主存储器的整体结构简单，体积小。

公开(公告)号：US6097841A

公开(公告)日：2000-08-01

申请号：US859410

申请日：1997-05-20

申请人： Keiko Gunji ,  Koyo Katsura ,  Soshiro Kuzunuki ,  Masaki Miura ,  Toshimi Yokota

发明人： Keiko Gunji ,  Koyo Katsura ,  Soshiro Kuzunuki ,  Masaki Miura ,  Toshimi Yokota

IPC分类号： G06K9/72

CPC分类号： G06K9/72 ,  G06K2209/01 ,  Y10S707/99931 ,  Y10S707/99933

摘要： A character recognition apparatus for inferring the entire character string solely from a user-input handwritten keyword and displaying the inferred result as a candidate character string. The apparatus of the invention comprises: a word dictionary storing word identification information and hierarchy information for layering a plurality of words into a hierarchy and for recognizing each of the words within the hierarchy; a character transition probability table a4 storing probabilities of transitions from any one character to another, and those pieces of the word identification information which correspond to combinations of characters resulting from the transitions; and an optimization unit for using the character transition probability table in optimizing candidate character strings obtained by a recognition unit. The word dictionary is searched for a word defined by the word identification information which corresponds to the optimized candidate character string, whereby the searched word is retrieved which applies to the hierarchy information and which has yet to be input.

摘要翻译： 一种字符识别装置，用于仅从用户输入的手写关键字中推断整个字符串，并将推测的结果显示为候选字符串。 本发明的装置包括：存储字识别信息和层级信息的单词字典，用于将多个单词分层为层次结构，并用于识别层次结构内的每个单词; 存储从任何一个字符到另一个字符的转换概率的字符转换概率表a4，以及对应于由转换产生的字符的组合的那些字识别信息; 以及优化单元，用于在通过识别单元获得的优化候选字符串中使用字符转换概率表。 搜索单词词典由对应于优化的候选字符串的单词识别信息定义的单词，由此检索适用于层级信息并且尚未被输入的搜索词。